1. Field of the Invention
The present invention relates to a semiconductor wafer, a package structure and a method of manufacturing the same, and more particularly, to a semiconductor wafer having array regions and die regions, a package structure and a method of manufacturing the same.
2. Description of the Prior Art
In the modern society, the micro-processor systems comprising integrated circuits (IC) are ubiquitous devices, being utilized in diverse fields such as automatic control electronics, mobile communication devices and personal computers. With the development of technology and the increase of original applications for electrical products, the IC devices are becoming smaller, more delicate and more diversified.
As well known in the art, an IC device is produced from dies that are fabricated by conventional semiconductor manufacturing processes. The process for manufacturing a die starts with a wafer: first, different regions are marked on the wafer; secondly, conventional semiconductor manufacture processes such as deposition, photolithography, etching or planarization are used to form the needed circuit trace(s); then, each region of the wafer is separated to form a die, and packaged to form a chip; finally, the chip is attached onto a board, a printed circuit board (PCB), for example, and the chip is electrically coupled to the pins on the PCB. Thus, each function on the chip can be performed.
In order to achieve the miniaturization demands, new packaging process and package structure are needed.